STD-W Chip Data Sheet

Features

  • SIPOS & Glass Passivation Junction & LTO
  • Crystal Method: CZ / FZ
  • Low Forward Voltage Drop
  • High Current Capability
  • High Reliability
  • High Surge Current Capability
  • Compatible With Soldering
  • Surface Metalization:Ni or Ni/Au

Ni TypicalThickness:0.4um
Au TypicalThickness:0.01um

Dimensions

Chip size

A +1/-2)(mil

B+1/-2)(mil

C±10

Square

 

 

 

380*380mil

380

346

250

480*480mil

480

446

250

Hexagon

 

 

 

380*380*380mil

380

346

250

 

Electrical Characteristics (TA=25)

Parameter

Symbol

VALUE

UNIT

Maximum repetitive peak reverse voltage

VRRM

200~1000

V

Maximum RMS voltage

VRMS

160~800

V

Maximum DC blocking voltage

VDC

200~1000

V

Maximum average forward rectified current

IF(AV)

See Next Table

A

Maximum instantaneous forwad voltage at IF

VF

See Next Table

V

Peak forward surge current 8.3 ms single half sine-wave superimposed on rated load

IFSM

See Next Table

A

Maximum DC reverse current at rated DC blocking voltage

IR

See Next Table

uA

Maximum reverse recovery time. Test conditions:IF=0.5A, IR=1A, IRR=0.25A.

Trr

See Next Table

ns

Operating tempeterature range

Tj

 -55150